The PCA9515 is a BiCMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling two buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length.Using the PCA9515 enables the system designer to isolate two halves of a bus, thus moredevices or longer length can be accommodated. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bus is isolated when 400 kHz operation of the other is required
- USD
- CNY
- HKD
- EUR
- العربية
- čeština
- dansk
- Deutsch
- Ελληνικά
- English
- Español
- Français
- ic
- Italiano
- Netherlands
- norsk Språk
- język polski
- pt
- Português
- 中文


PCA9515DP
Subscribe to get prices
Model: PCA9515DP
Order No:
SKU: 10000075088301
Size: 0.00 cm,0.00 cm,0.00 cm
Weight: 0.00kg
Brief Introduction
PCA9515DP
<p>The PCA9515 is a BiCMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling two buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length.Using the PCA9515 enables the system designer to isolate two halves of a bus, thus moredevices or longer length can be accommodated. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bus is isolated when 400 kHz operation of the other is required</p>
Description